Questions tagged [arm]

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Tiva ADC Sequencer with different step sources

I'm trying to measure some ADC channels with the same sequencer. I took a base on the Chapter 5 of Texas Tiva's ARM Cortex-M4 Workshop. So, my (interrupted) original code is working perfectly: #include #include #include 'inc/hw_memmap.h' #include 'inc/hw_types.h' #include 'inc/hw_ints.h' #include...
Rego
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Deploying SendGrid account using ARM template

I have an ARM template that deploys the SendGrid account but the deployment is always failing with error code': 'ResourcePurchaseValidationFailed', 'message': 'User failed validation to purchase resources. Error message: 'Offer with PublisherId: Sendgrid, OfferId: sendgrid_azure cannot be purchased...
DevMJ
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GCC ARM : vtable not initialized

I'm using arm-none-eabi-g++ to compile for an ARM Cortex M microcontroller. My code statically instantiates some modules, initialize them, and execute them sequentially in a loop. Each module (ModuleFoo, ModuleBar...) is a class which herits from a common Module class. The Module class defines two v...
Foaly
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Microsoft.Web/connections/gmail authorization via ARM template

Could you please advice how can I authorize my gmail api connection for logic app via arm template? I did for Microsoft.Web/connections/azureautomation with ParameterValues. It works, but I don't know how to do the same for a gmail connection. 'ParameterValues': { 'token:clientId': '****', 'token:...
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Is it possible to modularize a logic app ARM template

We know that way we can split a large ARM template into smaller templates (i.e. linked ARM templates), so that it is better manageable and maintainable. Can we do the same for logic apps ARM templates too. As far as the resources used in the logic apps ARM templates is concerned, it seems possible....
Kamal Nandan
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Get a character from a string value?

I have a set of numbers in a string (in memory) as follows: numbers DCB '012345' How can I access that first digit and insert it into a register? I would load it right, but I am unsure how to load that specific digit.
user3721428
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STM32L0 Freeze on setting NVIC/GPIO

I'm working with an STM32L073RZ CPU running MbedOS 5.11.2. Eventually I aim to get this working in a very low-power mode (STOP mode) that will be awoken with either an RTC interrupt or an interrupt from a peripheral device on pin PA_0 (WAKEUP_PIN_1). At the moment I am simply attempting to setup PA_...
Adam Mitchell
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Serious clang bug for compiling arm code

Yesterday, I found a catastrophic problem in clang when I was trying to compile a code for arm (in android arm-v7a at least). See this small code: void init_c_32(uint8_t *ptr) { uint32_t tmp[SIZE]; memcpy(tmp, ptr, 33); } here is the generated assembly code for calling memcpy here: 0x7903d714 : ldr...
Afshin
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Checking for overflow

I'm currently attempting to check for signed overflow when a multiplication operation is conducted by using the following method... muls r0, r1, r0 blvs overflow Which would branch off and print an overflow error message if overflow occurred. For example if the following input was r1 = 1,000,000,00...
0123
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Write to at91sam7s256 flash internally

I am currently developing a feature for a device based on Atmel's at91sam7s256 MCU. The feature is a counter with a pre-set value, which is decreased at some points. My Idea was to implement this counter in the internal flash memory, since most of the flash space is unused. I added a separate linker...
eeucalyptus
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What address I could access with LDR instruction of ARM

I'm totally new for ARM assembly code. I just checked the instruction set and found there is an instruction LDR which could be used as 'LDR{}{} Rd, '. I have two questions about this instruction: 1) Is the address here physical address or virtual address? 2) How could I know which address is 'legal'...
S.Wan
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Cross compiling stand alone application?

I am trying to cross compiling a stand alone application for arm board and most important I want to compile it without Android.mk framework. I have following doubt :- 1- Which tool should I use like (arm-eabi or arm-linux-androideabi etc). 2- From where should I download library and toolchain relate...
Pradeep Goswami
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Is it a good embedded programming practice to disable an interrupt in an interrupt? [closed]

I want to implement something in an ARM Cortex-M3 processor (with NVIC). I have limited knowledge about embedded systems, but I know, that an ISR routine should be as simple as possible. Now I have the following problem: I have an interrupt routine which invokes when a CAN message is received. In on...
Zoltán Várnagy
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What is the full form of Rd, Rn, Rm, Ra in assembly language?

We use these terms very often. But why are they named so is not clear.
Ankit Shubham
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Porting SWP instruction from ARMv4 to ARMv7

I'm attempting to port the following piece of code from ARMv4 to ARMv7 since the SWP/SWPB instructions have been deprecated. swp a1, a1, [a2] I have had an attempt myself and produced the following code, although I must admit I am unfamiliar with assembler. swapstore1 ldrex a3, [a2] strex a4, a...
QuiOui
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linking error while trying to add print_stack_trace

I am getting a error that looks like a linking problem, after adding a call to 'print_stack_trace' in one of the exception handlers inside my embedded Linux kernel code. Details are as below: My objective & context: I am trying to debug an 'imprecise external abort' memory fault during my kernel's b...
manikandan
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Clang cross-compilation for ARM

I'm trying to compile a file containing stdint.h for ARM (specifically Cortex-M3) using arm-none-eabi (which is a Debian's package) headers. The command is: clang -I/usr/lib/gcc/arm-none-eabi/4.8/include \ -target arm-none-eabi cfile.c -o cfile.o (-mcpu, -mfpu, -mfloat-abi are left out for simplicit...
andrey g
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G++ ARM cross compiling: undefined references

I am trying to compile the Jasmine OpenSSD code with arm-none-eabi-g++. However, it first failed with the following error message /usr/lib/gcc/arm-none-eabi/4.8.2/../../../arm-none-eabi/bin/ld: cannot find -lstdc++ To fix that, I ensured that linking with libstdc++.a was possible. Once I fixed that,...
Abhishek Joshi
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ARMv7a BL instruction, calculate target address

I try to understand how the target address is calculated in a BL instruction ARMv7a. I created a simple example program and compiled and linked it. The object file (elf) has the following instructions. ... 14: e3400000 movt r0, #0 18: eb00000f bl 5c 1c: e50b0008 str r0, [fp, #-8...
mjspier
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Cache invalidation while MMU init on RPI2

Recently i have experimented with MMU initialization code on raspberry pi 2 and encountered with strange behavior. What i am trying to do is to establish trivial sections mapping. I used this code as reference base. Although, the brief review had shown that this code is written for bcm2835, still do...
Alex Hoppus
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Bitwise Extract Vector in ASIMD instruction (ARM platform)

I want to implement bitwise extract vector instruction in ASIMD assembly instruction. Let me put it this way that in ARMv7 NEON instructions, suppose I have some values inside q15 and q11, and I have: 'vext.8 d30, d30, d22, #4 \n\t' 'vext.8 d31, d31, d23, #4 \n\t' As you can see here, I'm extracting...
A23149577
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Raspbian Assembler

When assembling the following line on raspbian : STMFDGT R0, {R1,R2,R3} Error: bad instruction `stmfdgt r0,{r1,r2,r3}' why is this legal mnemonic not recognized ? Without the condition part everything works fine. AS Version is: GNU assembler (GNU Binutils for Raspbian) 2.25 Copyright (C) 2014 Free...
Bert Huber
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Counting bits in arm assembly

I have found the following code for counting bits in a 4-bytes integer in Arm assembly in the minimal number of instructions: ;R0 - value ;R1 = number of ones ;Uses R0-R1 ;81 cycles worst case, 4 cycles best case, exit when r1=0 mov r1,r0,lsr #31 loop movs r0,r0,lsl #2 adc r1,r1,r0,lsr...
Arcady27
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NOPs on Multicore ARM A9

I have a dual core ARM A9 based processor that I need to do some pretty particular nanosecond timing with. I plan on using the NOP assembly instruction to achieve this by determining the number of nanoseconds that pass per cycle of the system clock. I'm wondering if there are any special considerat...
brad95411
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Why gcc (ARM) aren't using Global Register Variables as source operands?

here is a c source code example: register int a asm('r8'); register int b asm('r9'); int main() { int c; a=2; b=3; c=a+b; return c; } And this is the assembled code generated using a arm gcc cross compiler: $ arm-linux-gnueabi-gcc -c global_reg_var_test.c -Wa,-a,-ad ... mov r8, #2 mov r9, #...
gma
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How can i build locally mbed 2.0?

Hy, I can build mbedOS (mbed version of 3.0) with the yotta build system. Now I need a little help, to build mbed2.0 locally. I know there is an online compiler in the developer arm site, but i need to get some details about what is the difference between the two OS. Thanks.
Levente Orbán
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Can I easily compile u-boot with more commands for arm versatile bp

I have compiled u-boot from u-boot-2013.01.y branch for versatilebp board (arm), and I need fatload command that is not present in this configuation. I'm running u-boot under qemu DRAM: 128 MiB WARNING: Caches not enabled Using default environment In: serial Out: serial Err: serial Net: S...
csstudent
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Why is __ARM_FEATURE_CRC32 not being defined by the compiler?

I've been working on this issue for some time now, and I hope someone can point out my mistake. I guess I can no longer see the forest through the trees. I have a LeMaker HiKey dev board I use for testing. Its AArch64, so its has NEON and the other cpu features like AES, SHA and CRC32: $ cat /proc/c...
jww
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Assembly Load And Store 16 bits (half-word)

If I am trying to convert this C code into assembly: int16_t x, y; x = y; Then the corresponding assembly code would be: LDRSH R0, y; STRH R0, x; Does it matter if I write LDRSH R0, y; Or LDRH R0, y; without the S in LDRH? Since in int16_t x, y x and y are both signed ints (16 bits) correct? So wou...
CapturedTree
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3

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Multithreded applications on different CPUS

If, for example, there is a let's say embedded application which run on unicore CPU. And then that application would be ported on multi core CPU. Would that app run on single or multiple cores? To be more specific I am interested in ARM CPU (but not only) and toolchain specifics e. g. standard C/C++...
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ARM assembly calling a function with registers as parameters using C

I have the following ARM assembly code: mov r0, SP mov r1, LR bl func Is there a way of calling the function func using C code? something like func(SP, LR) Thanks!
YouYou
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Cortex M0 vs M0+ Programming perspective

I am struggling with which cortex to choose. Currently I have a design guy that will give me an M0 with memory for initial development but I want to use M0+ eventually. Assuming I give up the optional features of the M0+ (MPU and MTB), can I transfer the M0 code to the M0+ without any changes? I mea...
DrorNohi
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Working with GPIO on bcm2836

I am writing a GPIO-driver for my RPI2 OS. And I was surfing really long time about it, but I found only linux data. How should I do such functions as void gpio_set(int pin); void gpio_clr(int pin); in C for the driver. Or, maybe it can be done due inline assembly?
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Run “armasm.exe” failed: "The application was unable to start correctly (0xc000007b)

I installed both VS2013 and VS2015 Professional (full install), and both have a 'armasm.exe' under the bin folder. I set the bin folder into 'path' environment variable. When I tried 'armasm /?' under cmd, it prompts out a dialog box with a red cross sign, saying that: The application was unable to...
Hind Forsum
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Programming SAM uC family without ATmel Studio

I've asked this question on :https://electronics.stackexchange.com/ with no success, So I'm trying my luck here. I've designed a board that used a SAM uC (Cortex M0+). I don't want to use the ATmel Stduio, I want to learn how to use eclipse and arm-gcc and OpenOCD ( still can't understand, what th...
Engine
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Conditional statements based on #define's name

I just started doing some C (coming from Java). I'm trying to figure out what the language's approach to a conditional based on a define's name is. e.g. I have a huge header file that I can't(shouldn't) edit with a lot of defines. #define GPIO_OTYPER_OT_0 ((uint32_t)0x00000001)...
Enders
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How to use available libraries from within mbed-os?

I have pulled down a fresh copy of mbed-os by using the mbed-cli tool. $ mbed new mbed-os-test [mbed] Creating new program 'mbed-os-test' (git) [mbed] Adding library 'mbed-os' from 'https://github.com/ARMmbed/mbed-os' at latest revision in the current branch [mbed] Updating reference 'mbed-os' -> 'h...
sherrellbc
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How many least-significant bits are the same for both an unsigned and a signed multiplication?

ARM processors, for example, have a mul instruction, which performs a 32-bit x 32-bit multiplication and returns the least-significant 32-bits of the result. They also have umull and smull instructions, which again do a 32-bit x 32-bit multiplication, but return a full 64-bit result. umull does an u...
user200783
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99

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New-AzureRmVpnClientRootCertificate in ARM Template

How can I upload client root certificate with Azure ARM template instead of using Powershell command New-AzureRmVpnClientRootCertificate ? I have the whole environment in a template and that's the only thing missing.
alvipeo
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1k

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CLion, CMSIS and error: “expected identifier or '(' before '__asm'”

I'm trying to setup a CLion C working environment for my Cortex-M0 embedded processor. I'm completely new to CLion and cmake and I have been struggling for days with this problem: The issue arises in the core_cm0.h header file included in CMSIS. More specifically at these lines: #if defined ( __CC...
bad_coffee

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