Questions tagged [arm]

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why is the open() syscall supported on some Linux systems and not others?

I am inlining syscalls. Yes, I understand this is problematic but I have a good reason. I've tracked down my bug considerably and I'm just asking why has __NR_open disappeared on this arm64 Arch Linux system? 5.0.1-1-ARCH #1 SMP Sun Mar 10 15:08:34 MDT 2019 aarch64 GNU/Linux Again, my code is inlini...
Olsonist
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2

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Why doesn't ARM 11 or earlier support Adobe Flash player?

Why doesn't ARM 11 or earlier support Adobe Flash player (Android version)? If you can explain it in depth, you will be highly appreciated.
alwayssmile68
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NRF24 Transmit and Receive from same module

i am setting up two `nrf24l01' modules to talk to each other using two different boards, i.e., the nrf24 should receive some data and swap itself to Tx mode and the other nrf24 will transmit something and swap itself to Rx mode. And this process will continue. Till now i am able to successfully set...
Ehsan Habib
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Preventing or blocking cpu data cache loading

I'm tasked with evaluating various flavors of ARM processors (benchmarking), specifically System On a Chip (SOC). Some SOC's have a lot of data cache, others have little. Because of this, I'd like my program to block the data cache. I have written a Walking 1 test which accesses memory outside t...
Thomas Matthews
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2

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STM32 F446RE simple DAC output; what am I missing?

Trying to get some simple DAC output before moving forward. Have a multimeter on the output A2 but this seems to never change from about 1V6 for whatever value I put into the DAC2 output function. #include 'stm32f4xx.h' #include 'stm32f4xx_dac.h' void io_config(void) { GPIO_InitTypeDef GPIO_InitStr...
user50619
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BGE Instruction ARM

This test asks to branch under the condition 'BGE' branch to a label. The values stored in my registers being compared are: LDR r0,=0X3 LDR r1,=0X8F CMP r0,r1 BGE a_label SUBS r1,r1, #0XC9 I expected it to branch but somehow 0X8F isn't greater than 0X3. Emulating my code on Keil proves this. Im wond...
MangoKitty
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How to get lower and higher 32 bits of a 64-bit integer for gcc inline asm? (ARMV5 platform)

I have a project on armv5te platform, and I have to rewrite some functions and use assembly code to use enhancement DSP instructions. I use a lot of int64_t type for accumulators, but I do not have an idea how to pass it for arm instruction SMULL (http://www.keil.com/support/man/docs/armasm/armasm_d...
Yevhen Tsyba
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3

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How does an the ARM branch instruction address work?

I know that an ARM instruction is 32 bits in size and therefore in memory it take up 4 memory locations (each location can store 8 bits) But am confused on how a branch instruction address works When using e.g. a Branch instruction 4 bits are used for the operation 4 bits for the condition 24 bits...
ryandaniels
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Combining two assembly files together with both text and data section

I have two assembly files, a.s and b.s I want to combine both of them and create a new assembly file c.s The file c.s should have all the code in .text of a.s and then all then code in .text of b.s I want to do the same thing with .data section # File a.s VSUB.F32 S4, S5, S6 .data .word 0x10000000 #...
Amardeep reddy
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Is it possible to show progress for ARM deployment in Azure DevOps?

I have a pipeline in Azure DevOps. After building and testing stuff, I create Azure Resources in order to deploy the app there. I use Azure Resource Group Deployment task for that. It works, but in logs I see only this (for all the resouces I created): **********************************************...
psfinaki
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Generate a sine signal with time dependent frequency in C

I want to generate a sine signal with a time dependent frequency that varies periodically between fmin and fmax with a frequency f0 in C. Mathematically, this can be described by y(t)=1/2*(1+sin(2*Pi*(fmin*t + (fmax-fmin)*1/2*(t - 1/2/Pi/f0*cos(2*Pi*f0*t) + 1/2/Pi/f0)))) Because I want to use this o...
Peter123
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Unpredictable results in calculations under Cortex-A53

The Java code below returns unpredictable results when ran on a Cortex-A53 and specifically on Xperia XA devices. The first iterations print the correct values: [24, 42, 61, 45, 29, 46, 35, 36, 48, 47, 20, 64, 45, 15, 37, 70, 70, 70, 70, 70, 70, 70, 70, 70, 70, 70, 70, 70, 70, 70, 70] and after some...
Petrakeas
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1

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1.4k

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'CXXABI_1.3.11' not found`

I can't get a cross compiled build running on my Raspberry Pi 1 B+. The error I keep getting is: ImportError: /usr/lib/arm-linux-gnueabihf/libstdc++.so.6: version 'CXXABI_1.3.11' not found. I tried multiple compilers with different settings but I keep getting the same error. Also changing the LD_LI...
Sam
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0

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1.2k

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How to compile OpenCV 3.4 with Visual Studio 15 2017 ARM for UWP?

I have been struggling to compile OpenCV 3.4 for a couple of days now. Final target of the compile is ARM, since I am currently writing an UWP for Windows 10 IoT Core running on Raspberry Pi 3. I started my journey from here: https://developer.microsoft.com/en-us/windows/iot/samples/opencv where Mic...
Guido Magrin
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Uboot adding new serial driver on arm

I'm trying to add my own serial driver to uboot. That what I've been achieved so far are those messages: U-Boot SPL 2017.09-gdc4fd1d6eb-dirty (Dec 30 2017 - 09:13:03) DRAM: 2048 MiB Trying to boot from FEL but that is all. I know that there should be other messages also, but there are not any. I sus...
user2699113
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Cygwin shell not detected on Windows system

I am trying to compile a file using an ARM (RVCT 3.1) compiler. The makefile looks something like this (pasting extract) AS = armasm LD = armlink CC = armcc TCC = armcc #TCC = tcc CPP = armcpp TCPP = tcpp AR = armar NM = nm ifeq ($(TERM),c...
rangrot
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Virtual Address split in el2linux

According to this slides, when Linux is running in EL1 the Virtual Address space is in two different page tables: User space in TTBR0_EL1 (from 0x0 to 0x7f ffffffff) Kernel space in TTBR1_EL1 (from 0xffffff80 00000000 to 0xffffffff ffffffff) [both Linux Kernel & VM kernel?] From what I understood,...
igng
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1

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qemu-user cannot find shared libraries when run a dynamically linked executable

I have created a c++ app on Debian Jessie 8.10 amd64 targeted for arm architecture. I cross compiled the source code for armhf following the link https://wiki.embeddedarm.com/wiki/Jessie_armhf_Cross_Compile. The app is also dependent on some Poco shared libraries which are installed in folder /usr/l...
dk13
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561

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Convert array parameter values to comma separated string

I am deploying Vms to Azure with an ARM template. In my parameters file I have: 'nodePrivateIps': { 'value': [ { 'IpAddress': '10.0.10.1' }, { 'IpAddress': '10.0.10.2' }, { 'IpAddress': '10.0.10.3' } ] }, I am able to use this array in the template with: 'privateIPAddress': '[parameters('nodePrivate...
kaydub83
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1

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455

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Migrating from ARM 5 to ARM 6 Compiler: Unknown type name '__STATIC_INLINE' in ARM CMSIS file

Currently migrating a large embedded C project in uVision from ARM 5 to ARM 6 compiler. The most persistent error is error: unknown type name '__STATIC_INLINE' which occurs in the core_cm4.h file which is provided by ARM which is read-only, hence I am hesitant to edit it. Nevertheless, I changed (un...
a2xia
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SIGILL occurs when using remote debbuging on arm target even if handle SIGILL nostop is set

I'm trying to remote debug a c++ app from a windows host to a debian armbian target of cubietruck board (ARM® Cortex™-A7 Dual-Core). However the debbuger breaks while receiving SIGILL. I've searched and found the reason. It is described in this post SSL_library_init cause SIGILL when running unde...
dk13
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Qt & ARM Linux cross-compilation

Usually, I generate a Linux distribution with Yocto, to have a rootfs and a sysroot (SDK), without issue to cross-compile a QT application for ARM targets. With the NanoPi M2A board, there is no yocto layer, friendlyARM provides directly an image of the SDcard and a toolchain. 1- I did some interest...
GoblE
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The hidden __result local variable in armcc DWARF debug information

I'm writing tools for debugging Cortex-M and I have discovered an artefact when reviewing the DWARF .debug_info section which the armcc outputs for some C source. (The exact compiler is ARM Compiler 5.05.) For example when the C source contains a simple function such as: int function(int a) { int x;...
Matthew Gardiner
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771

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Can't create and reference a keyvault secret in the same ARM template deployment

as part of a deployment I'm doing I want to deploy a Key vault into a resource group, create some secrets and then deploy a SQL server into another resource group using one of these secrets as the admin password. The following is a snippet of the resources I am using to do this: { 'type': 'Microsoft...
Noble
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3

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390

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Create custom domain for app services via terraform

I am creating azure app services via terraform and following there documentation located at this site : https://www.terraform.io/docs/providers/azurerm/r/app_service.html Here is the snippet for terraform script: resource 'azurerm_app_service' 'app' { name = 'app-name' location...
focode
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Android app loading ARM shared library on x86 device fails

I have a really simple android app. I want to load a shared library called 'libcamera.so' and then call methods via JNI. I do not own this library and I do not have access to the source code. It was originally compiled for ARM. An x86 version is not available. The project can detect the library and...
Bakwon
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1

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398

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STM32F103 Timer2 not interrupting

Background I'm relatively inexperienced with the STM32 series, so I'm sure that this is simple and I'm missing a setup somewhere. I am trying to set up the timer to simply interrupt on an update event, which should be when the counter rolls over at the TIM2->ARR value. I am currently setting a break...
slightlynybbled
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STM32 GPIO register level input

It's actually a basic code for controlling buzzer with leds. I did with HAL libraries.But the institution I was working with wanted to do this at the register level too. But I couldn't it. It's not too complicated however i don't understand where the problem is. My code in below. #include 'stm32f10x...
magnesian
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Hardware timer triggered analog-digital conversion on ATSAM4S

I have a problem with a ATSAM4S ADC unit triggered by Timer 0 (channel 1). It seems that the ADC is triggered as fast as possible and blocks my whole application (OS is no longer operational due to this). I want an AD conversion with 1 Hz. This is my code: sysclk_enable_peripheral_clock(ID_TC1); uin...
user1995621
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ARM domains in the Linux kernel

I have been reading through some ARM code in order to try and understand what exactly the cpu_domain field inside the struct thread_info represents. In an attempt to understand how it is used, I looked through the places where the variable is referenced. I am trying to understand the following :- Wh...
learnlearnlearn
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Android does not see the executable file

I wrote a simple program in C that displays the string. I compiled it for the ARM architect and sent it via FTP to my rooted Leagoo M5. I mounted the memory as RW and moved the program to /data/local. I used 'chmod + x armexe' to add execute attributes. Despite this, after executing './armexe' the m...
Wiktor Sołtys
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(Eclipse oxygen/Linux) linker C/C++ RAM usage

At company we use Eclipse CDT to compile our embedded project. With all compilation options projects is really big and linking takes great amount of time and RAM memory. I have 8GB RAM and 8GB swap linux partition. Sometimes during linking 4GB of swap is used! After this OS is hardly working and I...
s.paszko
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Selenium chromedriver exception when enumerating elements by xpath

I'm trying to convert a Selenium script from Firefox to Chrome. The code works as expected with Firefox and geckodriver on x86_64. geckodriver does not support ARM well so I am attempting to move to Chrome. Chromium and chromedriver is causing an exception when using driver.find_elements_by_xpath('/...
jww
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450

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Rerunning ARM template cause error

I have a very simple ARM template which spins up an app service plan and a website. When I delete plan or resource group it works fine and creates new plan and website. Following is the template: { '$schema': 'https://schema.management.azure.com/schemas/2015-01-01/deploymentTemplate.json#', 'content...
TheVillageIdiot
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What is the effect of using ioremap on physical address already ioremapped by a driver?

I am trying to use the ARM watchdog thorough kernel space. I have a watchdog driver which is statically built and deployed in the kernel. The memory remapped by the driver is seen in /proc/iomem. cat /proc/iomem | grep wdt ff567000-ff567018 : /[email protected] The driver has remapped the address startin...
nishad kamdar
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How to start using arm-linux-gcc in Cygwin

Summarize the question (2018/5/4) I downloaded ARM Linux Toolchain for Cygwin from sourceforge here. It was last updated in 2010. I have a recently installed Cygwin in my win7 PC. And then, I tried to setup the tool. And I could successfully execute arm-linux-gcc -v. However, arm-linux-gcc --target...
huhiha
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Why is there is difference in number of instructions executed by a program when it is running under GDB?

I am using ARM PMU counter to count the number of instructions executed between two system calls by a process. Particularly I am using 'INST_RETIRED' event to count the number of instructions executed by a process in user mode. Reference: ARMv7 R/A Reference Manual. The number of instructions is con...
Jina Lee
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Which GCC version is preferred on an AARCH64 platform with CentOS7.4?

We have some servers with ARM CPU and will test some SW applications. With Ubuntu system, there is no big problem because the kernel and the SW are quite up-to-date. But with CentOS system, some tools and libs are quite old on ARM. For example, the GCC compiler is still 4.8.5 and some features could...
Polymersudo
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127

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check if defaultValue from ARM Templates exists

I'm currently trying to make some arm template validation, but i need to make a check for, if the parameters is having a default value assigned, otherwise i will need to give it a value for testing purposes. Currently i'm getting the names and types this way. $TemplateParameterNames = $TemplateJsonP...
Mathias Wrobel
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808

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Why does my Android device with ARMv8-based CPU cores (Exynos 7 Octa 7870) not support the arm64-v8a ABI or 64-bit instruction set?

I have an Android device (SAMSUNG Galaxy Tab Active2 SM-T397U) which has the Exynos 7870 SoC. The Exynos 7870 uses eight Cortex A-53 Cores that implement the Armv8-A architecture. However, it doesn't support the arm64-v8 ABI and it isn't clear which instruction set it supports. There are multiple An...
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